? semiconductor components industries, llc, 2004 september, 2004 ? rev. 2 1 publication order number: mc74hc164a/d mc74hc164a 8-bit serial-input/parallel- output shift register high?performance silicon?gate cmos the mc74hc164a is identical in pinout to the ls164. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. the mc74hc164a is an 8?bit, serial?input to parallel?output shift register. two serial data inputs, a1 and a2, are provided so that one input may be used as a data enable. data is entered on each rising edge of the clock. the active?low asynchronous reset overrides the clock and serial data inputs. features ? this device is manufactured with a pb?free external lead finish only* ? output drive capability: 10 lsttl loads ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 2 v to 6 v ? low input current: 1 a ? high noise immunity characteristic of cmos devices ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 244 fets or 61 equivalent gates logic diagram pin 14 = v cc pin 7 = gnd 3 q a 4 5 6 10 11 12 13 q b q c q d q e q f q g q h parallel data outputs 9 reset clock 8 serial data inputs a1 a2 1 2 data function table inputs outputs reset clock a1 a2 q a q b q h lxxxll l h x x no change hhddq an q gn hdhdq an q gn d = data input q an ? q gn = data shifted from the preceding stage on a rising edge at the clock input. *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. device package shipping 2 ordering information mc74hc164an pdip?14 2000 / box mc74hc164ad soic?14 55 / rail MC74HC164ADR2 soic?14 2500 / reel marking diagrams a = assembly location wl or l = wafer lot yy or y = year ww or w = work week mc74hc164adt tssop?14 96 / rail mc74hc164adtr2 tssop?14 2500 / reel tssop?14 dt suffix case 948g hc 164a alyw 1 14 1 14 pdip?14 n suffix case 646 mc74hc164an awlyyww soic?14 d suffix case 751a 1 14 hc164a awlyww pin assignment 11 12 13 14 8 9 10 5 4 3 2 1 7 6 q e q f q g q h v cc clock reset q b q a a2 a1 gnd q d q c 2for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. http://onsemi.com
mc74hc164a http://onsemi.com 2 ??????????????????????? ??????????????????????? maximum ratings ???? ???? symbol ?????????????? ?????????????? parameter ????? ????? value ??? ??? unit ???? ???? v cc ?????????????? ?????????????? dc supply voltage (referenced to gnd) ????? ????? 0.5 to + 7.0 ??? ??? v ???? ???? v in ?????????????? ?????????????? dc input voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? v out ?????????????? ?????????????? dc output voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? i in ?????????????? ?????????????? dc input current, per pin ????? ????? 20 ??? ??? ma ???? ???? i out ?????????????? ?????????????? dc output current, per pin ????? ????? 25 ??? ??? ma ???? ???? i cc ?????????????? ?????????????? dc supply current, v cc and gnd pins ????? ????? 50 ??? ??? ma ???? ? ?? ? ???? p d ?????????????? ? ???????????? ? ?????????????? power dissipation in still air, plastic dip2 soic package2 tssop package2 ????? ? ??? ? ????? 750 500 450 ??? ? ? ? ??? mw ???? ???? t stg ?????????????? ?????????????? storage temperature ????? ????? 65 to + 150 ??? ??? c ???? ? ?? ? ???? t l ?????????????? ? ???????????? ? ?????????????? lead temperature, 1 mm from case for 10 seconds (plastic dip, soic or tssop package) ????? ? ??? ? ????? 260 ??? ? ? ? ??? c ??????????????????????? ? ????????????????????? ? ??????????????????????? maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 2derating e plastic dip: 10 mw/ c from 65 to 125 c soic package: 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c for high frequency or heavy load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). recommended operating conditions ???? ???? symbol ??????????????? ??????????????? parameter ??? ??? min ?? ?? max ??? ??? unit ???? ???? v cc ??????????????? ??????????????? dc supply voltage (referenced to gnd) ??? ??? 2.0 ?? ?? 6.0 ??? ??? v ???? ???? v in , v out ??????????????? ??????????????? dc input voltage, output voltage (referenced to gnd) ??? ??? 0 ?? ?? v cc ??? ??? v ???? ???? t a ??????????????? ??????????????? operating temperature, all package types ??? ??? 55 ?? ?? + 125 ??? ??? c ???? ? ?? ? ? ?? ? ???? t r , t f ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? input rise and fall time v cc = 2.0 v (figure 1) v cc = 4.5 v v cc = 6.0 v ??? ? ? ? ? ? ? ??? 0 0 0 ?? ?? ?? ?? 1000 500 400 ??? ? ? ? ? ? ? ??? ns dc electrical characteristics (voltages referenced to gnd) ???? ???? ????????? ????????? ????????? ????????? ???? ???? ????????? ????????? guaranteed limit ??? ??? ???? ? ?? ? ???? symbol ????????? ? ??????? ? ????????? parameter ????????? ? ??????? ? ????????? test conditions ???? ? ?? ? ???? v cc v ???? ? ?? ? ???? ?55 c to 25 c ??? ? ? ? ??? 85 c ???? ? ?? ? ???? 125 c ??? ? ? ? ??? unit ???? ? ?? ? ? ?? ? ???? v ih ????????? ? ??????? ? ? ??????? ? ????????? minimum high?level input voltage ????????? ? ??????? ? ? ??????? ? ????????? v out = 0.1 v or v cc 0.1 v |i out | 20 a ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 1.5 2.1 3.15 4.2 ??? ? ? ? ? ? ? ??? 1.5 2.1 3.15 4.2 ???? ? ?? ? ? ?? ? ???? 1.5 2.1 3.15 4.2 ??? ? ? ? ? ? ? ??? v ???? ? ?? ? ? ?? ? ???? v il ????????? ? ??????? ? ? ??????? ? ????????? maximum low?level input voltage ????????? ? ??????? ? ? ??????? ? ????????? v out = 0.1 v or v cc 0.1 v |i out | 20 a ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 0.5 0.9 1.35 1.8 ??? ? ? ? ? ? ? ??? 0.5 0.9 1.35 1.8 ???? ? ?? ? ? ?? ? ???? 0.5 0.9 1.35 1.8 ??? ? ? ? ? ? ? ??? v ???? ? ?? ? ???? v oh ????????? ? ??????? ? ????????? minimum high?level output voltage ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 20 a ???? ? ?? ? ???? 2.0 4.5 6.0 ???? ? ?? ? ???? 1.9 4.4 5.9 ??? ? ? ? ??? 1.9 4.4 5.9 ???? ? ?? ? ???? 1.9 4.4 5.9 ??? ? ? ? ??? v ???? ? ?? ? ???? ????????? ? ??????? ? ????????? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 2.4 ma |i out | 4.0 ma |i out | 5.2 ma ???? ? ?? ? ???? 3.0 4.5 6.0 ???? ? ?? ? ???? 2.48 3.98 5.48 ??? ? ? ? ??? 2.34 3.84 5.34 ???? ? ?? ? ???? 2.20 3.70 5.20 ??? ? ? ? ??? this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high?impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74hc164a http://onsemi.com 3 dc electrical characteristics (voltages referenced to gnd) ??? ??? unit ????????? ????????? guaranteed limit ???? ???? v cc v ????????? ????????? test conditions ????????? ????????? parameter ???? ???? symbol ??? ??? ??? unit ???? ???? ???? 125 c ??? ??? ??? 85 c ???? ???? ???? -55 c to 25 c ???? ???? ???? v cc v ????????? ????????? ????????? test conditions ????????? ????????? ????????? parameter ???? ???? ???? symbol ???? ? ?? ? ? ?? ? ???? v ol ????????? ? ??????? ? ? ??????? ? ????????? maximum low?level output voltage ????????? ? ??????? ? ? ??????? ? ????????? v in = v ih or v il |i out | 20 a ???? ? ?? ? ? ?? ? ???? 2.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 0.1 0.1 0.1 ??? ? ? ? ? ? ? ??? 0.1 0.1 0.1 ???? ? ?? ? ? ?? ? ???? 0.1 0.1 0.1 ??? ? ? ? ? ? ? ??? v ???? ? ?? ? ???? ????????? ? ??????? ? ????????? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 2.4 ma |i out | 4.0 ma |i out | 5.2 ma ???? ? ?? ? ???? 3.0 4.5 6.0 ???? ? ?? ? ???? 0.26 0.26 0.26 ??? ? ? ? ??? 0.33 0.33 0.33 ???? ? ?? ? ???? 0.40 0.40 0.40 ??? ? ? ? ??? ???? ? ?? ? ???? i in ????????? ? ??????? ? ????????? maximum input leakage current ????????? ? ??????? ? ????????? v in = v cc or gnd ???? ? ?? ? ???? 6.0 ???? ? ?? ? ???? 0.1 ??? ? ? ? ??? 1.0 ???? ? ?? ? ???? 1.0 ??? ? ? ? ??? a ???? ???? i cc ????????? ????????? maximum quiescent supply current (per package) ????????? ????????? v in = v cc or gnd i out = 0 a ???? ???? 6.0 ???? ???? 4 ??? ??? 40 ???? ???? 160 ??? ??? a note: information on typical parametric values can be found in chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). ac electrical characteristics (c l = 50 pf, input t r = t f = 6 ns) ????? ????? ???????????????? ???????????????? ???? ???? ????????? ????????? guaranteed limit ??? ??? ????? ? ??? ? ????? symbol ???????????????? ? ?????????????? ? ???????????????? parameter ???? ? ?? ? ???? v cc v ???? ? ?? ? ???? ?55 c to 25 c ??? ? ? ? ??? 85 c ???? ? ?? ? ???? 125 c ??? ? ? ? ??? unit ????? ? ??? ? ? ??? ? ????? f max ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? maximum clock frequency (50% duty cycle) (figures 1 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 10 20 40 50 ??? ? ? ? ? ? ? ??? 10 20 35 45 ???? ? ?? ? ? ?? ? ???? 10 20 30 40 ??? ? ? ? ? ? ? ??? mhz ????? ? ??? ? ? ??? ? ????? t plh , t phl ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? maximum propagation delay, clock to q (figures 1 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 160 100 32 27 ??? ? ? ? ? ? ? ??? 200 150 40 34 ???? ? ?? ? ? ?? ? ???? 250 200 48 42 ??? ? ? ? ? ? ? ??? ns ????? ? ??? ? ? ??? ? ????? t phl ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? maximum propagation delay, reset to q (figures 2 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 175 100 35 30 ??? ? ? ? ? ? ? ??? 220 150 44 37 ???? ? ?? ? ? ?? ? ???? 260 200 53 45 ??? ? ? ? ? ? ? ??? ns ????? ? ??? ? ? ??? ? ????? t tlh , t thl ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? maximum output transition time, any output (figures 1 and 4) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 75 27 15 13 ??? ? ? ? ? ? ? ??? 95 32 19 16 ???? ? ?? ? ? ?? ? ???? 110 36 22 19 ??? ? ? ? ? ? ? ??? ns ????? ????? c in ???????????????? ???????????????? maximum input capacitance ???? ???? e ???? ???? 10 ??? ??? 10 ???? ???? 10 ??? ??? pf notes: 1. for propagation delays with loads other than 50 pf, see c hapter 2 of the on semiconductor high-speed cmos data book (dl129/d). 2. information on typical parametric values can be found in c hapter 2 of the on semiconductor high-speed cmos data book (dl129/d). typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (per package)* 180 pf * used to determine the no?load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d).
mc74hc164a http://onsemi.com 4 timing requirements (input t r = t f = 6 ns) ????? ????? ???????????????? ???????????????? ???? ???? ????????? ????????? guaranteed limit ??? ??? ????? ? ??? ? ????? symbol ???????????????? ? ?????????????? ? ???????????????? parameter ???? ? ?? ? ???? v cc v ???? ? ?? ? ???? ?55 c to 25 c ??? ? ? ? ??? 85 c ???? ? ?? ? ???? 125 c ??? ? ? ? ??? unit ????? ? ??? ? ????? t su ???????????????? ? ?????????????? ? ???????????????? minimum setup time, a1 or a2 to clock (figure 3) ???? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ???? 25 15 7 5 ??? ? ? ? ??? 35 20 8 6 ???? ? ?? ? ???? 40 25 9 6 ??? ? ? ? ??? ns ????? ? ??? ? ? ??? ? ????? t h ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? minimum hold time, clock to a1 or a2 (figure 3) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 3 3 3 3 ??? ? ? ? ? ? ? ??? 3 3 3 3 ???? ? ?? ? ? ?? ? ???? 3 3 3 3 ??? ? ? ? ? ? ? ??? ns ????? ? ??? ? ? ??? ? ????? t rec ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? minimum recovery time, reset inactive to clock (figure 2) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 3 3 3 3 ??? ? ? ? ? ? ? ??? 3 3 3 3 ???? ? ?? ? ? ?? ? ???? 3 3 3 3 ??? ? ? ? ? ? ? ??? ns ????? ? ??? ? ? ??? ? ????? t w ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? minimum pulse width, clock (figure 1) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 50 26 12 10 ??? ? ? ? ? ? ? ??? 60 35 15 12 ???? ? ?? ? ? ?? ? ???? 75 45 20 15 ??? ? ? ? ? ? ? ??? ns ????? ? ??? ? ? ??? ? ????? t w ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? minimum pulse width, reset (figure 2) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 50 26 12 10 ??? ? ? ? ? ? ? ??? 60 35 15 12 ???? ? ?? ? ? ?? ? ???? 75 45 20 15 ??? ? ? ? ? ? ? ??? ns ????? ? ??? ? ? ??? ? ????? t r , t f ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? maximum input rise and fall times (figure 1) ???? ? ?? ? ? ?? ? ???? 2.0 3.0 4.5 6.0 ???? ? ?? ? ? ?? ? ???? 1000 800 500 400 ??? ? ? ? ? ? ? ??? 1000 800 500 400 ???? ? ?? ? ? ?? ? ???? 1000 800 500 400 ??? ? ? ? ? ? ? ??? ns note: information on typical parametric values can be found in chapter 2 of the on semiconductor high?speed cmos data book (dl129/d).
mc74hc164a http://onsemi.com 5 pin descriptions inputs a1, a2 (pins 1, 2) serial data inputs. data at these inputs determine the data to be entered into the first stage of the shift register. for a high level to be entered into the shift register, both a1 and a2 inputs must be high, thereby allowing one input to be used as a data?enable input. when only one serial input is used, the other must be connected to v cc . clock (pin 8) shift register clock. a positive?going transition on this pin shifts the data at each stage to the next stage. the shift register is completely static, allowing clock rates down to dc in a continuous or intermittent mode. outputs q a ? q h (pins 3, 4, 5, 6, 10, 11, 12, 13) parallel shift register outputs. the shifted data is presented at these outputs in true, or noninverted, form. control input reset (pin 9) active?low, asynchronous reset input. a low voltage applied to this input resets all internal flip?flops and sets outputs q a ? q h to the low level state. switching waveforms t f v cc gnd 90% 50% 10% t w t plh t phl clock q t tlh t thl figure 1. reset t rec figure 2. t r 1/f max 90% 50% 10% v cc gnd v cc gnd q clock 50% 50% 50% t phl t w a1 or a2 figure 3. v cc gnd v cc gnd 50% 50% clock t su t h valid *includes all probe and jig capacitance c l * test point device under test output figure 4. test circuit
mc74hc164a http://onsemi.com 6 timing diagram a1 a2 clock reset 8 1 2 9 d r q 3 4 5 6 10 11 12 13 q a q b q c q d q e q f q g q h expanded logic diagram d r qd r qd r qd r qd r qd r qd r q clock reset a1 a2 q a q b q c q d q e q f q g q h
mc74hc164a http://onsemi.com 7 package dimensions pdip?14 n suffix case 646?06 issue n soic?14 d suffix case 751a?03 issue g 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 18.80 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m ??? 10 ??? 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n ?t? 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ?a? ?b? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ?t? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019
mc74hc164a http://onsemi.com 8 package dimensions tssop?14 dt suffix case 948g?01 issue o dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ?u? seating plane 0.10 (0.004) ?t? ?? ?? section n-n detail e j j1 k k1 detail e f m -w- 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ?v? 14x ref k n n on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mc74hc164a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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